High Speed Scaleable Multiplier

Description:

A high speed scalable multiplier. The high speed scalable multiplier can include a folding multiplier configured to fold multiplicands and multipliers where individual ones of the multiplicands and multipliers exceed a folding threshold. The folding multiplier also can compute a product of the multiplicands and multipliers based on less than all bits forming the multiplicands and multipliers. The high speed scalable multiplier also can include a conventional multiplier and at least one additional folding multiplier, each of the multipliers being individually, selectably activatable.

Patent Information:
Category(s):
Computer Science
For Information, Contact:
Dana Vouglitois
Florida Atlantic University
dvouglitois@fau.edu
Inventors:
Ravi Shankar
Keywords:
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